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作 者:陈二微 CHEN Erwei(College of Physics and Information Engineering,Fuzhou University,Fuzhou 350116,China)
机构地区:[1]福州大学物理与信息工程学院,福建福州350116
出 处:《仪表技术》2024年第6期28-32,共5页Instrumentation Technology
摘 要:由于模拟信号的压缩感知对噪声高度敏感,在噪声条件下其重构性能显著下降,这已成为制约模拟信号压缩感知技术进一步发展的主要瓶颈。提出了一种结合自适应迭代方法的稀疏独立正则化追踪(Adaptive Sparsity Independent Regularized Pursuit, A-SIRP)算法。该算法通过在自适应迭代过程中分离噪声原子,最大限度地减少了噪声的干扰,提升了输出信号的信噪比。设计了基于现场可编程门阵列的A-SIRP硬件架构,该架构主要包含计算模块、存储模块和控制模块。在Xilinx公司Kintex-7平台上运用硬件描述语言Verilog HDL对设计方案进行了验证。实验结果表明,所实现的A-SIRP硬件设计在数据位宽为20 bit的条件下,能够达到36.02 dB的重构峰值信噪比,充分验证了该算法在硬件实现上的可靠性和优越性。Due to the high sensitivity of analog signal compression sensing to noise,its reconstruction performance significantly decreases under noisy conditions,which has become the main bottleneck restricting the further development of analog signal compression sensing technology.A sparse independent regularized pursuit(A-SIRP)algorithm combined with an adaptive iteration method is proposed.The algorithm separates noise atoms during the adaptive iteration process to minimize the interference of noise and improve the signal-to-noise ratio of the output signal.A-SIRP hardware architecture based on field programmable gate arrays is designed,which mainly includes computing modules,storage modules,and control modules.The design scheme was validated using the hardware description language Verilog HDL on the Kintex-7 platform of Xilinx Company.The experimental results show that the implemented A-SIRP hardware design can achieve a reconstructed peak signal-to-noise ratio of 36.02 dB with a data bit width of 20 bits,which fully verifies the reliability and superiority of the algorithm in hardware implementation.
关 键 词:压缩感知 自适应迭代 稀疏独立正则化追踪算法 现场可编程门阵列 硬件架构
分 类 号:TH89[机械工程—仪器科学与技术] TN47[机械工程—精密仪器及机械]
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