An energy-efficient 32-bit bit-parallel superconducting SFQ specialized processor  

作　　者：Peiyao Qu Huanli Liu Xiangyu Zheng Jiahong Yang Liliang Ying Jie Ren Haihang You Guangming Tang 

机构地区：[1]State Key Lab of Processors,Institute of Computing Technology,Chinese Academy of Sciences,Beijing,China [2]University of Chinese Academy of Sciences,Beijing,China [3]Shanghai Institute of Microsystem and Information Technology,Chinese Academy of Sciences,Shanghai,China

出　　处：《Superconductivity》2024年第2期38-45,共8页超导（英文）

摘　　要：As the demand for energy efficiency rises,researchers are increasingly prioritizing the quest for energy-efficient chip design.Superconducting SFQ circuit technology has garnered attention due to its ultra-high speed and low power consumption characteristics.In this paper,we propose a layout method called Maximum Operating Frequency Constraint(MOFC)for SFQ circuit design.Using this method,we demonstrated a 32-bit bit-parallel string-matching processor fabricated based on SIMIT-Nb03P technology,which holds practical value.The MOFC method focuses on achieving high bit-width processor design within constrained area cost in SFQ circuits,contributing to less energy consumption.To the best of our knowledge,this represents the first demonstrated instance of a superconducting SFQ chip achieving successful internal 32-bit data parallel processing.Our chip has been fabricated and tested,revealing not only its capability for 32-bit bit-parallel processing at a high speed of 12 GHz but also its achievement of an energy efficiency ratio of up to 251 GOPS/W.

关 键 词：SFQ processor String-matching Superconducting integrated circuits 

分 类 号：O4[理学—物理]