基于CPLD+STM32F1的同步触发装置的设计  

Design of Synchronous Triggering Device Based on CPLD+STM32F1

作　　者：王帅 陈国旗 WANG Shuai;CHEN Guoqi(China Research Institution of Radiowave Propagation,Qingdao 266107,China)

机构地区：[1]中国电波传播研究所,山东青岛266107

出　　处：《电工技术》2024年第20期149-152,共4页Electric Engineering

摘　　要：外场测试中设备位于不同的3个位置且距离较远,基于实测中异地联调设备同步触发的需求,设计了同步触发装置。上位机通过USB数据线实现对同步触发装置的控制。选择CPLD(可编程逻辑器件)+STM32F1作为控制芯片,以和芯星通UM220-Ⅲ L双模高性能授时模块作为时间同步的基准,并使用合适的高精度晶振作为内部时钟源,保证高精度的触发控制。介绍了同步触发装置的软硬件设计,装置小巧、便捷、精准。同步触发装置通过USB口接收上位机指令,STM32F1处理指令并进行相应动作,CPLD具有强大的逻辑和时序功能,可以在系统编程,调试方便,完成预定波形的输出。在线仿真结果显示同步触发装置的精度在毫秒级,且具有较强的同步性。In the field test,the equipment is located in three different positions and far away.The synchronous triggering device was designed based on the requirement for synchronous triggering of remote joint debugging equipment in actual measurements.The host computer controled the synchronous triggering device through a USB data cable.The CPLD+STM32F1 was chosen as the control chip,and the CoreStar UM220-III L dual-mode high-performance timing module was used as the time synchronization reference,and a suitable high-precision crystal oscillator was used as the internal clock source,which ensured high-precision trigger control.The essay describes in detail the hardware and software design of the synchronization trigger device.The device is compact,convenient and accurate.The synchronous triggering device receives instructions from the host computer through the USB port,and the STM32F1 processes the instructions and takes corresponding actions.The CPLD(Programmable Logic Device)has powerful logic and timing functions,which can be easily programmed and debugged in the system to complete the output of predetermined waveforms.Online simulation confirmed that the synchronous triggering device has strong synchronization and accuracy of millisecond level.

关 键 词：CPLD STM32 同步触发 单片机 

分 类 号：TM93[电气工程—电力电子与电力传动]