高计数率多通道时间测量与串行读出电路研制  

Development of High-count Rate Multi-channel Time Measurement and Serial Readout Circuit

作　　者：陆伟建 千奕[1,2,3] 蒲天磊 赵红赟 孙志坤[1,2,3] 张家瑞 刘政强 LU Weijian;QIAN Yi;PU Tianlei;ZHAO Hongyun;SUN Zhikun;ZHANG Jiarui;LIU Zhengqiang(Institute of Modern Physics,Chinese Academy of Sciences,Lanzhou 730000,China;Advanced Energy Science and Technology Guangdong Laboratory,Huizhou 516000,China;School of Nuclear Science and Technology,University of Chinese Academy of Sciences,Beijing 100049,China)

机构地区：[1]中国科学院近代物理研究所,甘肃兰州730000 [2]先进能源科学与技术广东省实验室,广东惠州516000 [3]中国科学院大学核科学与技术学院,北京100049

出　　处：《原子能科学技术》2024年第12期2592-2600,共9页Atomic Energy Science and Technology

基　　金：国家自然科学基金面上项目(11975293,12105338);甘肃省级人才重点项目(2024)。

摘　　要：近年来应用于中高能核物理实验的先进前端读出专用集成电路(application specific integrated circuit,ASIC)芯片呈现出越来越强的数字化趋势,可提高系统的集成度并降低功耗。论文研制了一种高计数率多通道时间测量与串行读出电路(high-count rate multi-channel time measurement and serial readout circuit,HMTRC),可实现核事件去稀疏化、去随机化的读出。该电路主要包括了基于时钟分相技术的时间数字转化器、控制器、先进先出存储器和基于令牌环逻辑的轮询读出模块。HMTRC已被集成到一款自研的16通道前端读出ASIC芯片中,可测量和储存时间信息,并利用数字驱动的前端读出架构实现时间与能量信息同步读出。测试表明,时间分辨率好于2 ns,功能符合预期。Advanced front-end readout chips for medium and high energy nuclear physics experiments have shown an increasing trend towards digitization in recent years,increasing system integration and reducing power consumption.Guided by critical scientific goals,the Institute of Modern Physics of the Chinese Academy of Sciences is building a central scientific installation termed as the high intensity heavy-ion accelerator facility(HIAF).HIAF fragment separator(HFRS)is an important experimental device for radioactive beam physics research on the HIAF.The characteristics of HFRS strong current and the readout demand of the large area detectors put forward the requirements of high-count rate,high integration,and high time resolution for the front-end readout electronics,and therefore the development of the advanced digital front-end readout chip is urgently needed.The paper developed a high-count rate multi-channel time measurement and serial readout circuit(HMTRC)based on 180 nm complementary metal oxide semiconductor(CMOS)process,which can accelerate the development and iteration of such digital front-end readout chips.The HMTRC has now been integrated into a selfdeveloped 16 channel digital-analogue hybrid front-end readout chip,EDIMS,for position sensitive detectors on HFRS.When a charge signal is input,the charge-sensitive amplifier(CSA)integrates the signal into an exponentially decaying voltage signal and fans out to the time path and the energy path.In the time path,the fast shaper inputs the output signal of the CSA into the discriminator after shaping,and outputs the self-triggering signal after comparing with the threshold.The digital first input first output(FIFO)memory in each channel records information such as the timestamp and channel number corresponding to the front time of the trigger signal.In the energy path,the slow shaper integrates the output signal of the CSA into a quasi-Gaussian signal.The output signal of the peak detect and hold circuit(PDH)follows the leading edge of the output signal of the slo

关 键 词：ASIC 探测器前端读出电子学 FIFO 时钟分相技术 轮询读出 

分 类 号：TL82[核科学技术—核技术及应用]