Bi、Sb摩尔比为4:1的ZnO压敏陶瓷的低温烧结制备及性能  

Preparation and Properties of ZnO Varistor Ceramics Sintered at Low Temperature at Bi:Sb Molar Ratio of 4:1

作　　者：艾建平[1] 胡翔 帅亚萍 李文魁[1] 罗司玲 程丽红[1] AI Jianping;HU Xiang;SHUAI Yaping;LI Wenkui;LUO Siling;CHENG Lihong(Jiangxi Province Key Laboratory of Surface Engineering,Jiangxi Science and Technology Normal University,Nanchang 330038,Jiangxi,China)

机构地区：[1]江西科技师范大学,材料表面工程江西省重点实验室,江西南昌330038

出　　处：《硅酸盐学报》2024年第12期3799-3805,共7页Journal of The Chinese Ceramic Society

基　　金：国家自然科学基金(52102101,52267001);江西省研究生创新专项基金(YC2023–S882);材料表面工程江西省重点实验室平台基金(2024SSY05071)。

摘　　要：采用传统电子陶瓷制备工艺,制备了Bi、Sb摩尔比为4:1的ZnO–Bi_(2)O_(3)基压敏陶瓷,研究低温(<1000℃)烧结所得样品的显微结构和电学性能。结果表明,样品具有高的致密度和均匀的粒径,而且综合电学性能良好,电位梯度在599~1154V/mm范围内。当Bi_(2)O_(3)、Sb_(2)O_(3)含量分别为0.60%(摩尔分数)和0.15%时,900℃烧结的样品,综合电学性能最优,电位梯度高达1154 V/mm,非线性系数为13.7,漏电流为39μA。当烧结温度为920℃及以上时,Bi、Sb含量不同,Bi、Sb比值相同的2组样品,电位梯度非常接近,这为ZnO压敏陶瓷低碳制备提供一种新思路。Introduction ZnO varistor ceramics have some advantages of high nonlinear coefficient,low leakage current and low production cost,which are widely used in the protection of power systems and electronic equipment.With the development of electronic devices in the direction of better performance and miniaturization,the electrical performance of ZnO varistor ceramics needs to be further improved.It is thus necessary to prepare ZnO varistor ceramics with a high breakdown voltage and a uniform fine grain size.In common ZnO–Bi_(2)O_(3)–Sb_(2)O_(3)varistor ceramics,Bi_(2)O_(3)and Sb_(2)O_(3)are the two most important elements,and Bi_(2)O_(3)and Sb_(2)O_(3)doped in a certain proportion play an important role in the optimization of electrical properties and microstructure regulation of ZnO varistor ceramics.The melting point of Bi_(2)O_(3)is 825℃and the melting point of Sb_(2)O_(3)is 655℃in the high-temperature sintering process volatile,resulting in the loss of components and the increased porosity,structural uniformity,deterioration of electrical properties of ZnO varistor ceramics.Therefore,reducing the sintering temperature of ZnO varistor ceramics(i.e.,below 1000℃)is a necessity,which is expected to provide the experimental basis for the realization of pure silver internal electrode co-firing of multi-layer chip ZnO varistor elements.Methods ZnO-Bi_(2)O_(3)based varistor ceramics with a Bi:Sb molar ratio of 4:1 were prepared by a traditional electronic ceramics process.ZnO powder was mixed with Bi_(2)O_(3),Sb_(2)O_(3)powder,agate ball and deionized water in a certain proportion and then the mixed slurry was ground in a planetary ball mill.The ground mixed slurry was dried at 110℃,then ground and passed through the 100mesh screen.5%polyvinyl alcohol(PVA)solution was used as a binder for granulation,and then pressed into green billets with a diameter of 13 mm and a thickness of 2 mm.The green billet was firstly discharged in a muffle furnace at a rate of 2℃/min to 500℃,and then sintered in a sintering fu

关 键 词：氧化锌压敏陶瓷 铋/锑摩尔比 电学性能 显微结构 

分 类 号：TQ174[化学工程—陶瓷工业]