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作 者:蔡航宇 闫江 CAI Hangyu;YAN Jiang(School of Information,North China University of Technology,Beijing100144,China)
出 处:《电子元件与材料》2024年第10期1250-1256,1263,共8页Electronic Components And Materials
摘 要:设计了一种低压差线性稳压器(LDO),其仅消耗1.34μA静态电流,具有快速瞬态响应特性和100mA负载电流输出能力。该LDO电路采用零极点追踪补偿技术与伪等效串联电阻(pseudo-ESR)补偿技术相结合的方式,实现了全负载范围内的环路稳定性,取代了传统LDO依赖片外电容自身ESR产生零点的补偿方式,减少了补偿零点受温度与工艺的影响,同时降低了片外电容选择的难度。此外,环路中增加了class-AB电压缓冲器结构,在低静态电流的条件下提升了瞬态响应特性。本设计基于SMIC65nm工艺设计与仿真验证,实现了在3μF陶瓷输出电容下,当负载电流在0.1μs内从10mA到100mA跳变时,输出下冲电压为42mV,输出上冲电压为12mV,全负载范围内相位裕度在60°以上。A low-dropout regulator(LDO)was designed with fast transient response and 100mA load current output capability,which consumes only 1.34μA static current.The LDO circuit used the zero-pole tracking compensation technology combined with pseudo-equivalent series resistance(pseudo ESR)compensation technology to achieve loop stability in the full load range.It replaces the traditional LDO compensation method that relies on the ESR of the external capacitor to generate zero points,and it reduces the impact of temperature and technology on the compensation zero points,and it also reduces the difficulty of selecting external capacitors.In addition,a class-AB voltage buffer structure was added to the loop,which improves the transient response characteristics under low static current conditions.This design was based on the SMIC65nm process,which was verified by simulation.When the load current switches from 10mA to 100mA within 0.1μs using 3μF ceramic output capacitor,the output undershoot voltage is 42mV,and the output overshoot voltage is 12mV.The phase margin is above 60°within the full load range.
关 键 词:低静态电流 零极点追踪补偿 伪等效串联电阻补偿 class-AB电压缓冲器 低压差线性稳压器
分 类 号:TN432[电子电信—微电子学与固体电子学]
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