一种基于全差分环形放大器的高精度两步SAR ADC设计  

High-precision Two-step SAR ADC Design Using Fully Differential Ring Amplifier

作　　者：王庆玲 辛晓宁[1] 任建[1] 高从勇 张家豪 WANG Qingling;XIN Xiaoning;REN Jian;GAO Congyong;ZHANG Jiahao(School of Information Science and Engineering,Shenyang University of Technology,Shenyang 110870,P.R.China)

机构地区：[1]沈阳工业大学信息科学与工程学院,沈阳110870

出　　处：《微电子学》2024年第4期590-596,共7页Microelectronics

基　　金：国家自然科学基金面上项目(6187011861);辽宁省教育厅青年育苗项目(LQGD2020009)。

摘　　要：基于0.18μm CMOS工艺,设计了一款18位、采样率为5 MS/s的高精度逐次逼近型模数转换器(SAR ADC)。整体电路采取两步法的设计思路,利用全差分环形放大器将前级8位电容分裂型ADC的剩余电压放大后,再由后级10位桥接电容型ADC继续采样和量化,以此实现了高精度的模数转换器。采用了全差分环形放大器,该种放大器有高带宽、高增益和较低功耗的特点,在较低的功耗代价下,全差分环形放大器既有效提高了整体电路的精度,又充分验证两步SAR ADC架构在高精度SAR ADC设计上的可行性。仿真结果表明,在3 V电源电压、5 MS/s采样率下,SAR ADC的有效位数(ENOB)为17.03 bits,功耗为5.12 mW,无杂散动态范围(SFDR)为107.5 dB,信噪失真比(SNDR)为104.3 dB。This study presents the design of a high-precision successive approximation register analog-to-digital converter(SAR ADC)with a resolution of 18 bits and a sampling rate of 5 MS/s using the 0.18-μm CMOS process.The overall circuit design followed a two-step methodology,employing a fully differential ring amplifier to amplify the residual voltage from the front-end 8-bit capacitive-split ADC.This amplified signal was then further sampled and quantized using a 10-bit bridged-capacitor ADC in the back-end,resulting in highly accurate analog-to-digital conversion.The thesis employed a fully differential ring amplifier,which featured high bandwidth,high gain,and relatively low power consumption.With its low power consumption,the fully differential ring amplifier effectively enhanced the overall circuit accuracy and substantiated the feasibility of the two-step SAR ADC architecture in high-precision SAR ADC designs.Simulation results demonstrated that by operating at a power supply voltage of 3 V and a sampling rate of 5 MS/s,the SAR ADC achieved an effective number of bits(ENOB)of 17.03 bits,with a power consumption of 5.12 mW.Furthermore,it exhibited a spurious-free dynamic range(SFDR)of 107.5 dB and a signal-to-noise and distortion ratio(SNDR)of 104.3 dB.

关 键 词：模数转换器 两步法 电容分裂 桥接电容 高精度 

分 类 号：TN432[电子电信—微电子学与固体电子学]