基于复杂可编程逻辑器件的数字频率计设计  

Design of Digital Cymometer Based on Complex Programmable Logic Device

作　　者：潘明[1] 

机构地区：[1]桂林电子工业学院计算机系,桂林541004

出　　处：《广西科学院学报》2002年第4期244-247,251,共5页Journal of Guangxi Academy of Sciences

摘　　要：选用在系统可编程大规模集成 isp LS110 32 - 70 PL CC84芯片作硬件电路 ,以 L attice Ex-pert7.1作 EDA设计工具 ,设计一种新型数字频率计 ,该频率计采用 ABEL- HDL对其中的各部分元器件进行编程 ,实现了闸门控制电路、计数电路、多路选择电路、位选电路、段选电路等。频率计的测频范围 :1Hz～ 70 MHz..该设计方案通过了软件仿真。Lattice Expert 7.1 is used successfully to make a new-type digital cymometer with a Complex Programmable Logic Device (CPLD) used as virtual kernel of the cymometer,and a large programmable logic device (ispLSI1032E) used as hardware circiuit. The one chip includes strobe control circuit,count circuit,multi-choice circuit,bit-choice circuit, segment-choice circuit which are designed by ABEL-HDL.The frequency is designed from 1 Hz to 70 M Hz. The whole system passes the debugging in software simulation, software and hardware parts.

关 键 词：数字频率计 复杂可编程逻辑器件 硬件描述语言 设计方法 闸门控制电路 计数电路 

分 类 号：TM935.133[电气工程—电力电子与电力传动]