基于多总线接口的抗高过载数据记录装置的设计  

Design of Anti-High Overload Data Recording Device Based on Multi-Bus Technology

作　　者：赵富成 吴柯锐 高晨程 张会新[1] ZHAO Fucheng;WU Kerui;GAO Chencheng;ZHANG Huixin(State Key Laboratory of Dynamic Measurement Technology,North University of China,Taiyuan 030051,China;THE PLA Unit 93160,Beijng 100076,China)

机构地区：[1]中北大学省部共建动态测试技术国家重点实验室,太原030051 [2]中国人民解放军93160部队,北京100076

出　　处：《遥测遥控》2025年第1期90-96,共7页Journal of Telemetry,Tracking and Command

基　　金：国家自然科学基金资助项目(62201523)。

摘　　要：设计并实现了一种具有抗高过载特性的多总线接口数据记录装置,以应对飞行器在高冲击力和高过载环境中的数据记录需求。该装置以现场可编程门阵列(FPGA)为核心,集成了1553B总线、以太网和RS422三种通信接口,确保了在多种数据传输速率下信号采集的准确性和可靠性。通过多层结构吸能设计、灌封防护技术、微型化电路设计及高效存储模块等关键技术的应用,显著提升了系统的抗高过载能力和整体稳定性。经过测试验证,该装置能够在极端过载环境中稳定运行,确保数据的完整性和系统的可靠性。This paper presents the design and implementation of a multi-bus interface data recording device with high overload resistance,specifically developed to meet the data recording demands of aircraft operating in high-impact and high-overload environ‐ments.The device is centered around a Field-Programmable Gate Array(FPGA)and integrates three communication interfaces:1553B bus,Ethernet,and RS422,ensuring accurate and reliable signal acquisition across various data transmission rates.The appli‐cation of key technologies such as multi-layer energy absorption structure design,encapsulation protection technology,miniaturized circuit design,and efficient storage modules significantly enhances the system's overload resistance and overall stability.Testing and verification have demonstrated that this device can operate stably in extreme overload environments,ensuring data integrity and sys‐tem reliability.

关 键 词：抗高过载 多总线接口 FPGA 数据记录装置 

分 类 号：V445.15[航空宇航科学与技术—飞行器设计] TP333[自动化与计算机技术—计算机系统结构]