应用于生物阻抗测量的24位三阶四比特单环前馈增量式Σ-ΔADC  

A 24-bit incremental sigma-delta ADC with a 3^(rd)-order,4-bit single-loop feedforward structure for bioimpedance measurement

作　　者：孙傲然 陈长欢 陈阳 孙权 张杰[1] 王晓飞 张鸿[1] SUN Aoran;CHEN Changhuan;CHEN Yang;SUN Quan;ZHANG Jie;WANG Xiaofei;ZHANG Hong(School of Microelectronics,Xi'an Jiaotong University,Xi'an 710049,China;Xi'an Aerospace Minxin Technology Co.,Ltd.,Xi'an 710076,China)

机构地区：[1]西安交通大学微电子学院,西安710049 [2]西安航天民芯科技有限公司,西安710076

出　　处：《集成电路与嵌入式系统》2025年第2期1-10,共10页Integrated Circuits and Embedded Systems

基　　金：江苏省科技计划揭榜挂帅项目(BE2023005-5);国家重点研发计划项目(2022YFC2404902)。

摘　　要：生物阻抗测量技术是各种新兴医疗仪器进行医学诊断、健康监测的重要手段,而高精度的读出电路是实现精确诊断的关键。传统生物阻抗测量系统的读出电路常采用逐次逼近模/数转换器(SAR ADC)实现,在不采用校准算法时,其精度通常不超过12位,无法满足日益提高的生物阻抗读出精度要求。针对该问题,设计了一款面向生物阻抗信号测量的24位增量式Σ-ΔADC,采用三阶四比特单环前馈结构,在降低量化噪声的同时加快转换速度。在设计中使用数据加权平均(DWA)技术,降低了多比特反馈数/模转换器(DAC)失配引起的非线性,显著提升ADC精度;采用系统级斩波消除ADC前端系统失调。另外,本文采用了可配置的数字滤波器设计,通过配置不同的过采样率(OSR)可实现测量时间与输出精度的灵活折衷。采用180 nm工艺对该ADC进行流片验证,测试结果表明,在128个时钟周期的测量时长条件下(等效为128倍过采样率),ADC的有效位数达到17.8位,信噪比为108.9 dB,总谐波失真为-113.3 dB,等效输入RMS噪声为2.95μV RMS,工作时整体功耗为930μW。Bioimpedance measurement technology serves as a vital tool for medical diagnosis and health monitoring in various emerging medical instruments,in which the high-precision readout circuit is a crucial module for achieving accurate diagnoses.Traditional readout circuits in bioimpedance measurement systems often utilize SAR ADCs,which can hardly achieve an accuracy exceeding 12 bits to meet the increasingly high-precision demands for bioimpedance readout without calibration.To deal with this issue,this paper presents a 24-bit incrementalΣ-ΔADC designed for bioimpedance measurement which adopts a 3^(rd)-order,4-bit,single-loop feedforward structure to reduce quantization noise while accelerate the conversion speed.The design incorporates data weighted averaging(DWA)technique to mitigate the nonlinearity caused by multibit feedback DAC’s mismatch,significantly enhancing the ADC’s accuracy.In addition,system-level chopping is employed to eliminate systematic offset in the ADC frontend.A configurable digital filter is designed to achieve flexible tradeoff between measurement time and by configuring different oversampling ratios(OSR).The ADC is fabricated using a 180 nm process,with measurement results under an OSR of 128 showing that the ADC achieves an ENOB of 17.80,a SNR of 108.89 dB,a THD of-113.29 dB,an equivalent input RMS noise of 2.95μV_(RMS).The power consumption is 930μW for the whole ADC chip.

关 键 词：生物阻抗测量 高阶增量式Σ-ΔADC 多比特量化 DWA算法 系统级斩波 

分 类 号：TN43[电子电信—微电子学与固体电子学]