用于高压集成电路的延时电路设计方法  

The Design Method of Delay Circuits for High-Voltage Integrated Circuits

作　　者：王景军[1] WANG Jing-jun(Hangzhou Silan Microelectronics CO.,LTD.)

机构地区：[1]杭州士兰微电子股份有限公司

出　　处：《中国集成电路》2024年第12期47-52,56,共7页China lntegrated Circuit

摘　　要：本文针对传统的延时电路不能确保低压区的输入信号能成功的传送到高压区,从而导致电路产生误动作,降低高压集成电路可靠性的缺点,提出了一种用于高压集成电路的延时电路设计方法,能够有效的解决上述问题,避免高压集成电路产生误动作,从而提高高压集成电路的可靠性。This paper addresses the shortcoming of traditional delay circuits where they cannot ensure successful transmission of input signals from low-voltage zones to high-voltage zones,leading to malfunctions and reduced relia-bility in high-voltage integrated circuits.A design method for delay circuits in high-voltage integrated circuits is proposed,capable of effectively resolving these issues.It prevents malfunctions in high-voltage integrated circuits,thereby enhancing their overall reliability.

关 键 词：延时 电路 高压 可靠性 

分 类 号：TM7[电气工程—电力系统及自动化]