Smaller,faster,lower-power analog RRAM matrix computing circuits without performance compromise  

作　　者：Yubiao LUO Pushen ZUO Shiqing WANG Zhong SUN Ru HUANG 

机构地区：[1]School of Integrated Circuits,Peking University,Beijing 100871,China [2]Institute for Artificial Intelligence,Peking University,Beijing 100871,China [3]Beijing Advanced Innovation Center for Integrated Circuits,Beijing 100871,China

出　　处：《Science China(Information Sciences)》2025年第2期289-302,共14页中国科学(信息科学)(英文版)

基　　金：supported by National Key R&D Program of China(Grant No.2020YFB2206001);National Natural Science Foundation of China(Grant Nos.62004002,92064004,61927901);111 Project(Grant No.B18001)。

摘　　要：Recently,the analog matrix computing(AMC)concept has been proposed for fast,efficient matrix operations,by configuring global feedback loops with crosspoint resistive memory arrays and operational amplifiers(OAs).The implementation of a general real-valued matrix(containing both positive and negative elements)is enabled by using a set of analog inverters,which,however,is considered inefficient regarding circuit compactness,power consumption,and temporal response.Here,with the assistance of the conductance compensation(CC)strategy to take full advantage of the inherent differential inputs of OAs,new AMC circuits without analog inverters are designed.Such a design saves the area occupation and power dissipation of analog inverters,and thus turns to be smaller and lower-power.Simulation results reveal that the new circuit also shows a faster response towards the steady state,thanks to the reduction of poles in the circuit,which,again,is contributed by the elimination of analog inverters.Along with all of these benefits,extensive simulations demonstrate that the CC-AMC circuits do not compromise the computing performance in terms of relative error caused by various non-ideal factors in the circuit.

关 键 词：analog computing in-memory computing matrix resistive memory conductance compensation 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]