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作 者:曾树铭 倪伟 ZENG Shuming;NI Wei(School of Microelectronics,Hefei University of Technology,Hefei 230601,China)
机构地区:[1]合肥工业大学微电子学院,安徽合肥230601
出 处:《合肥工业大学学报(自然科学版)》2025年第2期185-195,共11页Journal of Hefei University of Technology:Natural Science
基 金:国家自然科学基金资助项目(61874156);安徽省高校协同创新资助项目(GXXT-2019-030)。
摘 要:为研究异构多核片上系统(multi-processor system on chip,MPSoC)在密集并行计算任务中的潜力,文章设计并实现了一种适用于粗粒度数据特征、面向任务级并行应用的异构多核系统动态调度协处理器,采用了片上缓存、任务输出的多级写回管理、任务自动映射、通讯任务乱序执行等机制。实验结果表明,该动态调度协处理器不仅能够实现任务级乱序执行等基本设计目标,还具有极低的调度开销,相较于基于动态记分牌算法的调度器,运行多个子孔径距离压缩算法的时间降低达17.13%。研究结果证明文章设计的动态调度协处理器能够有效优化目标场景下的任务调度效果。In order to explore the potential of heterogeneous multi-processor system on chip(MPSoC)in intensive parallel computing tasks,a dynamic scheduling coprocessor for heterogeneous MPSoC is designed and implemented,which is suitable for coarse-grain data characteristics and oriented to task-level parallel applications.The dynamic scheduling coprocessor adopts the mechanisms of on-chip cache,multilevel write-back management,automatic task mapping,out-of-order execution of communication tasks,etc.The experimental results show that the dynamic scheduling coprocessor can not only achieve the basic design objectives such as the out-of-order execution of the tasks,but also has low scheduling overhead.It reduces the time of running the multi-subaperture range compression algorithm by 17.13%compared with the scheduler based on the dynamic scoreboard algorithm,which proves that it could effectively optimize the task scheduling effect under the target scenario.
关 键 词:动态调度 硬件调度器 异构多核系统 任务级并行 编程模型 片上缓存 片上网络
分 类 号:TP332.3[自动化与计算机技术—计算机系统结构]
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