数字压电叠堆执行器:原理、建模与控制  

Digital Piezoelectric Stack Actuators:Principle,Modeling and Control

作　　者：凌杰 张允执 陈龙 朱玉川[1] LING Jie;ZHANG Yunzhi;CHEN Long;ZHU Yuchuan(College of Mechanical and Electrical Engineering,Nanjing University of Aeronautics and Astronautics,Nanjing,210016)

机构地区：[1]南京航空航天大学机电学院,南京210016

出　　处：《中国机械工程》2025年第2期228-237,共10页China Mechanical Engineering

基　　金：航空科学基金(ASFC-20220007052001)。

摘　　要：针对高精度驱动需求,从新型离散构型和数字驱动原理出发,首先探究不同数字编码方式下数字压电叠堆执行器的动、静态输出特性;其次探究数字驱动下迟滞减小的内在机理,结合非线性动力学数学建模描述执行器的迟滞、蠕变和动力学等特性;最后提出数字开/关时间控制来消除剩余迟滞,进一步提高定位精度。实验结果表明,相比传统压电叠堆,数字压电叠堆迟滞减小66%以上,所提的建模方法在10 Hz以内均方根误差小于0.3889μm,所提的数字开/关时间控制方法能够在10 Hz以内有效消除执行器剩余迟滞特性的影响。Based on the new discrete configuration and the principle of digital drive,the dynamic and static output characteristics of a digital piezoelectric stack actuator(DPEA)were studied under different digital coding modes.Secondly the internal mechanism of hysteresis reduction under digital drive,was explored,and described the hysteresis,creep and dynamics characteristics of the DPEA were combined with nonlinear dynamic mathematical modeling.Finally,digital on/off time control was proposed to eliminate the remaining hysteresis and further improve the positioning accuracy.Experimental results show that compared to traditional piezoelectric stacks,the hysteresis of DPEA is reduced by more than 66%.The proposed modeling method yields a root mean square error of less than 0.3889μm within 10 Hz.The proposed digital on/off time control may effectively eliminate the residual hysteresis of the DPEA within 10 Hz.

关 键 词：智能材料 驱动技术 迟滞 数字控制 

分 类 号：TH7[机械工程—仪器科学与技术] TP223[机械工程—精密仪器及机械]