二元扩域下的低延迟SM2加密FPGA实现  

Low-latency FPGA Implementation of SM2 Encryption in Binary Extension Fields

作　　者：臧帅辰 储成群 甄国涌 ZANG Shuaichen;CHU Chengqun;ZHEN Guoyong(School of Instrument and Electronics,North University of China,Taiyuan 030051)

机构地区：[1]中北大学仪器与电子学院,太原030051

出　　处：《舰船电子工程》2025年第1期127-131,共5页Ship Electronic Engineering

基　　金：国家自然科学基金项目(编号:62131018);山西省科技重大专项计划“揭榜挂帅”项目(企业重大技术攻关类)“工控系统可信安全环境构建关键技术研究”(编号:202101010101017)资助。

摘　　要：针对现代安全领域对低延迟加密的需求,论文对基于Montgomery椭圆曲线点乘算法的SM2加密的整体计算流程进行了研究。首先将SM2加密算法分解为多个独立步骤并映射到具体的FPGA模块,随后对各模块的计算时序以并行的方式进行编排,得到了一种低延迟FPGA实现方法。使用所提出的方法计算一次GF(2^(256))下的SM2加密需要4102个时钟周期,计算一次GF(2^(512))下的SM2加密需要8198个时钟周期,与传统串行计算方法相比,所需时钟周期数减少了20%。最后,论文在Xilinx Virtex-7平台上实现了所提出的方法,执行一次GF(2^(256))下的SM2加密需要43.31μs,执行一次GF(2^(512))下的SM2加密需要109.47μs。To address the demand for low-latency encryption in modern security domains,this paper investigates the overall computation process of SM2 encryption based on the Montgomery elliptic curve point multiplication algorithm.The SM2 encryption algorithm is firsty decomposed into multiple independent steps and mapped to specific FPGA modules.Subsequently,the computa⁃tion timing of each module is arranged in a parallel manner,resulting in a low-latency FPGA implementation method.The proposed method is used to perform SM2 encryption over GF(2^(256))requires 4102 clock cycles,while over GF(2^(512))it requires 8198 clock cy⁃cles,representing a 20%reduction in clock cycles compared to traditional serial computation methods.Finally,the proposed meth⁃od is implemented on the Xilinx Virtex-7 platform,where performing SM2 encryption over GF(2256)takes 43.31 microseconds,and over GF(2^(512))takes 109.47 microseconds.

关 键 词：SM2加密 FPGA 椭圆曲线点乘 MONTGOMERY算法 

分 类 号：TN918.4[电子电信—通信与信息系统]