AES融合多维混沌理论的硬件实现  

Hardware Implementation of AES Fused with Multi-dimensional Chaos Theory

作　　者：李锦明[1] 王欣[1] LI Jinming;WANG Xin(School of Semiconductor and Physics,North University of China,Taiyuan 030051)

机构地区：[1]中北大学半导体与物理学院,太原030051

出　　处：《舰船电子工程》2024年第12期44-49,60,共7页Ship Electronic Engineering

基　　金：基础研究群项目(编号:514010504-308)资助。

摘　　要：航空飞行器在飞行过程中的各项数据参数具有较强的保密要求,因此对加密技术也提出了更高的要求。AES应用广泛但存在密钥单一、密钥空间固定问题。文章在128位AES算法的轮密钥基础上用二维logistic映射重新计算种子密钥和扩展密钥,减少密钥之间的相关性。设计采用芯片XC7K160T的资源进行硬件实现,结合FPGA综合仿真,结果表明改进后的算法密钥质量明显改善,破译难度系数上升,硬件实现性能稳定,结果正确。The data parameters of the aircraft in the flight process have strong security requirements,so higher requirements are put forward for the encryption technology.AES is widely used but has the problems of single key and fixed key space.In this pa⁃per,based on the round key of 128-bit AES algorithm,the seed key and expansion key are recalcalated by two-dimensional logistic mapping to reduce the correlation between the keys.The design uses the resources of the chip XC7K160T for hardware implementa⁃tion,combined with FPGA synthesis simulation,the results show that the improved algorithm key quality is significantly improved,the difficulty coefficient of decipher is increased,the hardware implementation performance is stable,and the result is correct.

关 键 词：AES 二维LOGISTIC映射 FPGA 密钥空间 独立性 

分 类 号：TP309[自动化与计算机技术—计算机系统结构]