多场景下锁相环同步VSC暂态失稳边界研究  

Transient Instability Boundary of PLL-synchronous VSC in Multiple Scenarios

作　　者：陈征 胡鹏飞[1] 杨再欣 于彦雪 江崇熙 CHEN Zheng;HU Pengfei;YANG Zaixin;YU Yanxue;JIANG Chongxi(College of Electrical Engineering,Zhejiang University,Hangzhou 310027,China;Inner Mongolia Electric Power Research Institute,Hohhot 010020,China;Hangzhou Power Supply Company,State Grid Zhejiang Electric Power Co.,Ltd.,Hangzhou 310001,China)

机构地区：[1]浙江大学电气工程学院,杭州310027 [2]内蒙古电力科学研究院,呼和浩特010020 [3]国网浙江省电力有限公司杭州供电公司,杭州310001

出　　处：《电源学报》2025年第1期84-92,共9页Journal of Power Supply

基　　金：内蒙古自治区科技重大专项资助项目(2021ZD0026);浙江省自然科学基金资助项目(LQ21E070004);国家自然科学基金资助项目(52007167)。

摘　　要：针对弱网状态下基于锁相环PLL(phase locked loop)电压源换流器VSC(voltage source converter)的暂态失稳问题,综合考虑电网线路阻抗、VSC无功注入、PLL滤波的影响,并针对电网电压跌落、频率波动、三相不对称故障等多种故障场景,基于临界失稳电压对VSC的暂态失稳边界进行全面研究。通过分析不同运行场景下VSC并网向量图,建立多场景下VSC并网系统电网电压与线路阻抗及其阻抗角、VSC运行功率及其功率因数、PLL锁相误差和电网频率等因素之间的数学模型,进而基于临界失稳电压指明VSC的暂态失稳边界。实验结果表明:线路电阻和无功注入均会直接降低临界失稳电压,提高系统的稳定性;网侧频率增加或降低会直接导致锁相环产生相位滞后或超前、线路电抗增大或降低,间接影响临界失稳电压,进而影响VSC的暂态稳定性;锁相环前级滤波器可能导致锁相结果产生误差,其相位滞后或超前会分别降低或提高系统的临界失稳电压。Aimed at the transient instability of a voltage source converter(VSC)based on phase locked loop(PLL)under weak network conditions and considering the influences of power grid line impedance,VSC reactive power injection and PLL filtering,the transient instability boundary of VSC is comprehensively studied based on the critical voltage in a variety of fault scenarios such as grid voltage sag,frequency fluctuation and three-phase asymmetric fault.Through the analysis of the VSC grid-connected vector diagram in different operation scenarios,the mathematical models of relationships between the grid voltage of VSC grid-connected system and factors(e.g.,line impedance and impedance angle,VSC operation power and its power factor,PLL phase-locked error,and grid frequency)in multiple scenarios are established.Then,the transient instability boundary of VSC is indicated based on the critical voltage.Results show that both the line resistance and reactive power injection can directly reduce the critical voltage and improve the stability of the system.The increase or decrease in grid-side frequency will directly lead to the phase lag or lead of PLL and an increase or decrease in line reactance,thus indirectly affecting the critical voltage and further affecting the transient stability of VSC.The PLL pre-filter may cause errors in the phase-locked result,and its phase lag or lead will reduce or increase the critical instability voltage of the system,respectively.

关 键 词：电压源变流器 暂态稳定性 多场景 锁相环 

分 类 号：TM46[电气工程—电器]