检索规则说明:AND代表“并且”;OR代表“或者”;NOT代表“不包含”;(注意必须大写,运算符两边需空一格)
检 索 范 例 :范例一: (K=图书馆学 OR K=情报学) AND A=范并思 范例二:J=计算机应用与软件 AND (U=C++ OR U=Basic) NOT M=Visual
作 者:郭丰睿 路静[1] 刘浩 武欣 GUO Fengrui;LU Jing;LIU Hao;WU Xin(Beijing Aerospace Automatic Control Institute,Beijing 100854,China)
出 处:《移动信息》2025年第2期208-210,共3页Mobile Information
摘 要:随着信号处理领域向着高速率大带宽的趋势发展,控制器和负载之间互连链路反应出的串扰、畸变、振铃等信号完整性问题日益突出.文中基于高速缓存DDR4提出了一种将PCB作为信号载体的新型FLY-BY拓扑结构,有效弱化了多负载芯片非理想效应和传输链路阻抗突变,提高了信号接收双方的电平裕量,为更高速率、更高复杂度电路上的一驱多互连设计提供了有效手段.As the field of signal processing evolves towards high-speed and large bandwidth,signal integrity issues such as crosstalk,distortion,and ringing,manifested in the interconnection link between controllers and loads,are becoming increasingly prominent.This paper proposes a novel FLY-BY topology using PCB as a signal carrier based on DDR4,which effectively mitigates the non-ideal effects of multi-load chips and abrupt impedance changes in transmission links,increases the level margin of both signal transmitting and receiving ends,and provides an effective means for the design of Multi load interconnection on higher speed and higher complexity circuits.
分 类 号:TM711[电气工程—电力系统及自动化]
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在载入数据...
正在链接到云南高校图书馆文献保障联盟下载...
云南高校图书馆联盟文献共享服务平台 版权所有©
您的IP:3.129.39.144