一种基于共享DDR的多核异构数据高速交互方法  

A High-Speed Data Interaction Method for Multi-Core Heterogeneous Systems Based on Shared DDR

作　　者：黄宇锴 王舒杨 姜波 HUANG Yukai;WANG Shuyang;JIANG Bo(School of Mechanical Engineering,Nanjing University of Science and Technology,Nanjing 210094)

机构地区：[1]南京理工大学机械工程学院,南京210094

出　　处：《飞控与探测》2025年第1期77-88,共12页Flight Control & Detection

摘　　要：针对飞行器导航系统中的多源传感器数据交互效率问题,提出了基于共享内存的多核处理器高速数据交互方法,设计了高速数据传输通道和OpenAMP架构的异构多核数据通信方案,解决了数据信号读取与交互中实时(高速)性、可靠性问题。从硬件上,设计了可编程逻辑部分的系统链路连接方式,并采用AXI DMA控制器实现向DDR存储器的高速数据写入。通过SoC中的两片Cortex-A9处理器分别运行裸机程序和Linux系统,基于RPMsg协议实现了多核处理器之间的数据大量交互。经过实际操作与测试验证,在系统时钟频率最高为100 MHz,单次数据传输量最大达到10000×4 B时,FPGA向DDR存储器写入数据的速度可达到244 MB/s,实现了大规模数据的有效交互。Aiming at the problem of multi-source sensor data interaction efficiency in aircraft navigation systems,the paper investigates a high-speed data interaction method for multi-core processors based on shared memory,designing a high-speed data transmission channel and a heterogeneous multi-core data communication scheme using the OpenAMP architecture.This approach resolves issues of real-time(high-speed)performance and reliability in data signal reading and interaction.From a hardware perspective,the paper designs the system link connection method for the programmable logic part and employs an AXI DMA controller to achieve high-speed data writing to DDR memory.By running a bare-metal program and a Linux system on two Cortex-A9 processors within the SoC,extensive data interaction between the multi-core processors is realized based on the RPMsg protocol.Through practical operation and testing,it is verified that at a maximum system clock frequency of 100 MHz and a single data transmission volume of up to 10000×4 B,the speed of writing data from the FPGA to DDR memory can reach 244 MB/s,achieving efficient large-scale data interaction.

关 键 词：高速数据通信 多核异构 嵌入式系统 

分 类 号：TN702[电子电信—电路与系统] U666.123[交通运输工程—船舶及航道工程]