Energy Efficient FIR Filter Design Using Distributed Arithmetic  

作　　者：GANJIKUNTA Ganesh Kumar MOHAMMED Mahaboob Basha SIBGHATULLAH Inayatullah Khan 

机构地区：[1]Department of Electronics and Communication Engineering,Sreenidhi Institute of Science and Technology,Hyderabad 501301,Telangana,India

出　　处：《Journal of Shanghai Jiaotong university(Science)》2024年第6期1023-1027,共5页上海交通大学学报(英文版)

摘　　要：This paper presents a distributed arithmetic(DA)architecture that can efficiently implement finite impulse response(FIR)filters for biomedical signal processor applications.FIR filter design is more efficient when it uses a look-up table(LUT)-based technique rather than a serial one.The design’s performance and efficiency can be improved by using segmented memory banks as well as memory lookup for multiply operation.Verilog HDL is used to model the proposed design,and Synopsys Design Compiler tool is used for synthesis.The FIR filter architecture utilizing DA results in a 24.82%reduction in total power compared with the serial FIR structure.

关 键 词：distributed arithmetic(DA) serial finite impulse response(FIR)filter biomedical signal processing dynamic voltage and frequency scaling 

分 类 号：TN713[电子电信—电路与系统]