基于DDR3的高效距离门重排设计  

A Design on Distance Gate Rearrangement Based on DDR3

作　　者：何广亮 李飞飞[1] 陈旭凯 HE Guangliang;LI Feifei;CHEN Xukai(China Airborne Missile Academy,Luoyang,Henan 471009)

机构地区：[1]中国空空导弹研究院,河南洛阳471009

出　　处：《火控雷达技术》2025年第1期104-108,共5页Fire Control Radar Technology

摘　　要：为提高雷达信号处理的效率,设计一种利用DDR3存储芯片高效的完成脉冲雷达体制下距离门重排的方法。该方法设计了基于FPGA的DDR3读写控制逻辑,通过控制DDR3的BANK地址和数据地址,以跳BANK的方式按某种特定规律将雷达回波脉冲压缩信号的全部距离门信息写入到DDR3内,完成距离门重排。在满足脉冲多普勒雷达体制下对数据处理速度和时间要求的前提下,实现了更快的数据存储与读取的整体速率。仿真结果表明,在写入和读出相同的脉冲压缩信号距离门信息数据量情况下,通过对比跳BANK写入且连续地址读出、连续地址写入且跳跃地址读出以及跳跃地址写入且连续地址读出三种数据写入与存储方式,跳BANK写入且连续地址读出的写速率与读速率分别是516M*32bps和731M*32bps,综合整体速率是三种方法中最快的。本文所提设计方法能够高效完成距离门重排,适用于处理大数据量的雷达信号处理系统。In order to improve the efficiency of radar pre-signal processing,a method is designed to complete the distance gate rearrangement in the pulse radar regime efficiently by using DDR3 memory chip.The method was based on the FPGA design of FPGA-based DDR3 read/write control logic,which completed the distance gate rearrangement by controlling the BANK address and data address of the DDR3 and writing all the distance gate information of the radar echo pulse compression signal into the DDR3 by jumping the BANK according to a specific law.Under the premise of meeting the data processing speed and time requirements in the pulse Doppler radar regime,a faster overall rate of data storage and reading was achieved.The simulation results showed that,in the case of writing and reading out the same amount of pulse compression signal distance gate information data,by comparing the three data writing and storing modes of jump BANK writing and continuous address reading,continuous address writing and jump address reading,and jump address writing and continuous address reading,the writing rate and reading rate of jump BANK writing and continuous address reading are 516M*32bps and 731M*32bps,respectively.731M*32bps,the overall rate was the fastest among the three methods.The design method proposed in this paper can efficiently complete the distance gate rearrangement and was suitable for radar signal processing systems that handle large amounts of data.

关 键 词：DDR3 距离门重排 FPGA 雷达信号预处理 脉冲多普勒雷达 

分 类 号：TN957[电子电信—信号与信息处理] TJ760[电子电信—信息与通信工程]