乘累加运算在FPGA 中的仿真教学设计  

Simulation Teaching Design of Multiply Accumulate on FPGA

作　　者：陈艳 庄冰妮 樊亚妮 杨飒[1] CHEN Yan;ZHUANG Bingni;FAN Yani;YANG Sa(Guangdong University of Education,Guangzhou 510303,China)

机构地区：[1]广东第二师范学院,广东广州510303

出　　处：《现代信息科技》2025年第5期149-153,共5页Modern Information Technology

基　　金：高等教育教学质量与教学改革项目(2023jxgg20、2020jxgg10);大学生创新创业训练计划项目(202314278073)。

摘　　要：近年来,随着人工智能的飞速发展,计算数据/参数逐年呈现指数级增长,支持高效计算的硬件设计成为新趋势。由于计算功耗低,FPGA成为加速人工智能计算的有效方案之一。人工智能模型中通常含有大量的乘累加运算(Multiply Accumulate,MAC)。文章基于FPGA设计了支持乘累加计算的实验案例。该教学案例有助于学生掌握神经网络中乘累加运算的设计方法,还能启发思维,提高学生在FPGA人工智能加速器设计方面的能力,为其进一步成长为学习型人才打下良好的专业基础和实践基础。In recent years,with the rapid development of Artificial Intelligence,the computational data or parameters have shown an exponential growth year by year,and the hardware design to support efficient computing has become a new trend.Due to its low computing power consumption,FPGA is one of the effective solutions to accelerate AI computing.AI models often contain a lot of MAC.This paper designs an experimental case based on FPGA which supports the MAC.This teaching case helps students to master the design method of MAC in neural networks,and can also inspire their thinking and improve students'ability to design FPGA AI accelerators,so as to lay a good professional and practical foundation for their further growth into learning talents.

关 键 词：仿真教学 实验设计 乘累加运算 

分 类 号：TN791[电子电信—电路与系统]