一种射频SiP模组链路快速验证方法研究  

Research on a Rapid Verification Method for RF System-in-Package Module Links

作　　者：崔梦琦 余怀强 张磊[2] 王玺[2] 代春玥 CUI Mengqi;YU Huaiqiang;ZHANG Lei;WANG Xi;DAI Chunyue(CETC Academy of Chips Technology,Chongqing 401332,China;The 26th Research Institute of China Electronics Technology Group Corporation,Chongqing 400060,China)

机构地区：[1]中国电科芯片技术研究院,重庆401332 [2]中国电子科技集团公司第二十六研究所,重庆400060

出　　处：《压电与声光》2025年第1期108-112,共5页Piezoelectrics & Acoustooptics

摘　　要：针对射频SiP模组设计周期长、成本高、兼容性差等问题,提出了一种射频SiP模组链路快速验证方法。该方法将射频SiP模组内的射频器件分装于不同积木块中,再将积木块拼接形成有目标电路功能的验证链路。通过对该链路进行测试,可快速验证射频SiP模组设计是否达标。为实现积木块间良好互连,设计了高频连接桥压接结构。测试结果经去嵌计算,得到18 GHz内插入损耗最大值为1.34 dB。通过搭建与测试二次变频射频SiP模组链路,表明该方法具备低损耗、可重构、可复用等特性,对射频SiP模组快速设计具有重要的工程意义。To tackle the issues of long design cycles,high costs,and poor compatibility in radiofrequency(RF)system-in-package(SiP)modules,this paper presents a fast verification method for RF SiP module links.RF devices in the module are separately packed into different building blocks.These blocks are then assembled to form a verification link with the desired circuit functions.By testing this link,we can quickly check if the RF SiP module design meets the requirements.A high-frequency connection bridge crimping structure is designed for good inter-block connection.Test results,after de-embedding calculation,showed that within 18 GHz,the maximum insertion loss value was 1.34 dB.Building and testing the verification link of a dual-conversion RF SiP module demonstrated that the proposed method had low loss along with reconfigurable and reusable features.The rapid design of RF SiP modules is of great engineering importance.

关 键 词：射频SiP 快速验证 高频连接桥 可重构 可复用 

分 类 号：TN61[电子电信—电路与系统]