基于串并联减小允差实现标准电容器  

Realization of Standard Capacitors Based on Series Parallel Reduction Tolerance

作　　者：唐万生 张翠翠[1] 宋佳玲 TANG Wansheng;ZHANG Cuicui;SONG Jialing

机构地区：[1]中国工程物理研究院计量测试中心

出　　处：《计量与测试技术》2025年第3期68-71,共4页Metrology & Measurement Technique

摘　　要：标准电容器作为电容量值的实物器具,虽准确度较高,但体积较大,不宜集成于便携式装置。因此,本文提出一种基于电容串并联实现高准确度标准电容器的方法。通过理论分析,得到多个电容串联和并联后组合电容的允差公式,揭示组合与单个电容的允差的关系,并通过仿真分析,验证该理论的准确性,得到组合电容的分布情况;进行电路设计和试验验证。结果表明:组合后的电容的准确度符合理论预期。Standard capacitors as a physical appliance of capacitance value,although the accuracy is high,but the volume is large,it is not suitable for integration in portable devices.Therefore,a method of realizing high accuracy standard capacitors based on capacitor series parallel is proposed in this paper.Through theoretical analysis,the tolerance formula of combined capacitors after multiple capacitors in series and parallel is obtained,and the relationship between the tolerance of combination and single capacitor is revealed.The accuracy of the theory is verified by simulation analysis,and the distribution of combined capacitors is obtained.Carry out circuit design and test verification.The results show that the accuracy of the combined capacitance accords with the theoretical expectation.

关 键 词：标准电容器 串并联 高准确度 

分 类 号：TM5[电气工程—电器]