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作 者:李若曦 陈杰 刘威[1,2,3,4] LI Ruoxi;CHEN Jie;LIU Wei(School of Physics and Technology,Wuhan University,Wuhan 430072,China;School of Microelectronics,Wuhan University,Wuhan 430072,China;Hubei Luojia Laboratory,Wuhan 430072,China;Wuhan Institute of Quantum Technology,Wuhan 430072,China)
机构地区:[1]武汉大学物理科学与技术学院,湖北武汉430072 [2]武汉大学微电子学院,湖北武汉430072 [3]湖北珞珈实验室,湖北武汉430072 [4]武汉量子技术研究院,湖北武汉430072
出 处:《电子设计工程》2025年第8期6-11,16,共7页Electronic Design Engineering
基 金:国家重点研发计划项目(2022YFA1402503);湖北珞珈实验室专项基金(220100025)。
摘 要:以国产开源RISC-V架构32位处理器蜂鸟E203为蓝本,在位操作扩展与浮点运算方面提升处理器的计算性能。原处理器在Coremark程序测试中跑分约为2.12 CoreMark/MHz,位操作扩展后达到约3.15 CoreMark/MHz,相比原处理器的Coremark跑分提高了49%,额外查找表资源开销仅增加15%左右,同时功耗基本维持不变。设计的浮点运算协处理单元在Whetstone程序的跑分结果为0.815 MIPS/MHz。架构优化同时包含密码学指令扩展,共支持了额外的70条RISC-V指令。优化后的处理器可以应用于高性能嵌入式计算,如音频图像等高精度数字信号处理领域。Based on the domestic open source RISC-V architecture 32-bit processor Hummingbird E203,it improves the processor’s computing performance in terms of bit operation expansion and floating point operations.The original processor scored about 2.12 CoreMark/MHz in the Coremark program test.After the bit operation expansion,it reached about 3.15 CoreMark/MHz.Compared with the original processor,the Coremark score increased by 49%,and the additional lookup table resource overhead only increased by about 15%,while the power consumption remains basically unchanged.The designed floating-point arithmetic co⁃processing unit achieved a running score of 0.815 MIPS/MHz in the Whetstone program.The architecture optimization also includes cryptographic instruction extensions,supporting a total of 70 additional RISC-V instructions.The optimized processor can be applied to high⁃performance embedded computing,such as audio and image and other high⁃precision digital signal processing fields.
分 类 号:TN40[电子电信—微电子学与固体电子学]
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