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作 者:昂扬 黄正峰 王芳慧 郭二辉 田伟 鲁迎春 ANG Yang;HUANG Zhengfeng;WANG Fanghui;GUO Erhui;TIAN Wei;LU Yingchun(School of Microelectronics,Hefei University of Technology,Hefei 230601,China;Wuxi Stars Micro System Technologies Co.,Ltd.,Wuxi 214000,China)
机构地区:[1]合肥工业大学微电子学院,安徽合肥230601 [2]无锡众星微系统技术有限公司,江苏无锡214000
出 处:《合肥工业大学学报(自然科学版)》2025年第4期482-486,494,共6页Journal of Hefei University of Technology:Natural Science
基 金:国家自然科学基金资助项目(62274052);模拟集成电路国家重点实验室基金资助项目(6142802200506)。
摘 要:针对在服务器领域中使用串行连接SCSI接口(serial attached small computer system interface,SAS)硬盘存储冷数据面临的高成本问题,文章设计一种基于串行ATA(serial advanced technology attachment,SATA)协议与SAS协议的数据传输方法SATA Bridge,动态地实现SAS与SATA之间的数据传输。该方法通过一种快速响应的流控机制,可在4个时钟周期后完成数据传输的响应,大幅度缓解数据帧接收端的数据容纳压力,并支持在12.0 Gib/s与1.5 Gib/s的最大速率差下实现数据传输。在VCS、Verdi上通过通用验证方法学(universal verification methodology,UVM)和SystemVerilog对该方法进行验证,同时进行逻辑综合和形式验证,结果表明SATA Bridge方法可行,最后通过布局布线得到SATA Bridge方法的整体布局。文章提出的数据传输方法对SAS-SATA桥接芯片的设计具有一定的参考意义。In view of the high cost of cold data storage faced by hard disks with serial attached small computer system interface(SAS)in the server field,this paper designs and simulates a data transmission system based on serial advanced technology attachment(SATA)protocol and SAS protocol,namely SATA Bridge,which dynamically completes the data transmission between SAS and SATA.The sytem adopts a fast response flow control mechanism to respond under the delay of four clock cycles when transmitting data,which greatly alleviates the data holding pressure at the data frame receiving side.Besides,the system can realize data transfer at the maximum rate difference of 12.0 Gib/s to 1.5 Gib/s.Universal verification methodology(UVM)and SystemVerilog are used for verification on VCS and Verdi.Logic synthesis and formal verification are also performed,which verifies the feasibility of the system.Finally,the overall floorplan of the system is obtained through placement and routing.The system proposed in this paper has certain reference significance for the design of SAS-SATA bridge chip.
关 键 词:SATA 3.0协议 SAS 3.0协议 桥接芯片 流控 速率协商
分 类 号:TN402[电子电信—微电子学与固体电子学]
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