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作 者:吴国才 张玉龙 孙瑞 时建成 杨彪 Wu Guocai;Zhang Yulong;Sun Rui;Shi Jiancheng;Yang Biao(College of Integrated Circuits and Optoelectronic Chips,Shenzhen Technology University,Shenzhen 518118,China;Integrated Optoelectronic Engineering Center,Shenzhen Technology University,Shenzhen 518118,China)
机构地区:[1]深圳技术大学集成电路与光电芯片学院,广东深圳518118 [2]深圳技术大学集成光电子工程中心,广东深圳518118
出 处:《微纳电子技术》2025年第5期87-93,共7页Micronanoelectronic Technology
基 金:国家自然科学基金青年基金(61805162)。
摘 要:返工清洗互补金属氧化物半导体(CMOS)晶体管栅极上的光刻胶掩膜层,不合理的工艺将会导致栅极膜层电阻的偏高。制备多晶硅/WSi2结构的CMOS栅极膜层,然后对栅极进行光刻图形化处理并明确光刻胶清洗的机理。通过引入田口方法组合清洗工艺中的变量和分析实验数据,确定了栅极膜层电阻偏高的主要因素。再结合WSi2的膜厚变化情况,推测引起电阻偏高的主要原因,提出调换清洗顺序的工艺优化方案并进行对比实验。结果显示,工艺优化后电阻差降低到了0.9Ω/□,相比优化前降低了84%,有效避免了因返工导致的CMOS栅极膜层电阻偏高的问题。Rework to clean the photoresist mask layer on the gate of the complementary metal oxide semiconductor(CMOS)transistor,an unreasonable cleaning process will result in higher resistance of the gate film.The film layer of the CMOS gate with poly-Si/WSi2 structures was prepared,then the gate was patterned by the lithographic process,and the principle of photoresist cleaning was clarified.By adopting the Taguchi method to combine the variables of cleaning process and analyze the experimental data,thus the main factors for the higher resistance of the gate film layer were identified.Combined with the change of film thickness of WSi2,the main reasons for the high resistance were deduced,the process optimization scheme of changing the cleaning sequence was proposed and the comparison experiment was carried out.The results indicate that the difference in resistance is reduced to 0.9Ω/□after process optimization,which is 84%lower than before optimization,effectively avoiding the problem of higher resistance of the CMOS gate film layer due to rework.
关 键 词:互补金属氧化物半导体(CMOS)晶体管栅极 光刻胶清洗 田口方法 工艺优化 电阻差
分 类 号:TN386.1[电子电信—物理电子学]
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