并行计时偏差评测指标及工具  

Metrics and Tools for Evaluating the Deviation in Parallel Timing

作　　者：廖秋承 周洋 林新华 LIAO Qiucheng;ZHOU Yang;LIN Xinhua(Center for High-Performance Computing,Shanghai Jiao Tong University,Shanghai 200240,China;Science and Technology Department of Zhejiang Province,Hangzhou 310006,China)

机构地区：[1]上海交通大学高性能计算中心,上海200240 [2]浙江省科技厅,杭州310006

出　　处：《计算机科学》2025年第5期41-49,共9页Computer Science

基　　金：国家自然科学基金(62072300)。

摘　　要：在并行计算程序中插桩计时,是多核处理器中常用的性能测量和分析手段。然而,高精度并行计时的准确性受到计时方法、硬件配置和运行时环境等影响,测量结果不稳定,性能分析结论难以复现。近年来,高性能多核处理器的核心数量不断攀升,给多核心并行计时的准确性带来了更大挑战。目前,在真实计算程序中,高精度并行计时技术面临两大问题:1)无法定量比较不同计时函数的准确性;2)无法定量分析多种因素影响下微秒、毫秒级并行计时分布的偏差幅度。针对上述问题,首先设计了用于定量评测计时结果统计学分布偏差的指标,并开发了支持X86和Armv8指令集的多核心计时结果偏差评测工具ParTES。ParTES可以模拟真实计算场景的缓存特征和计时间隔,定量评测不同计时函数的测量偏差。其次,在鲲鹏、飞腾和海光高性能处理器上开展了微秒和毫秒级并行计时稳定性量化分析。实验结果表明,计时方法、缓存命中率、计时函数邻近指令和服务器硬件配置等因素,均会对并行计时结果的准确性产生影响。在鲲鹏、飞腾和海光处理器上,计时结果偏差最小且偏差幅度变化最稳定的计时方法分别是PAPI的计时函数、POSIX的clock_gettime计时函数和C86指令集汇编计时指令RDTSC。In parallel computing,instrumenting specific code segments is commonly used for performance evaluation on multicore processors.However,factors such as timing methods,hardware configurations,and runtime environments affect parallel timing accuracy,jeopardizing stability and reproducibility of performance measurements.As the core number of multicore processors grows,accurate parallel timing has grown more challenging.Two key problems remain:1)current method cannot quantitatively compare the accuracy of different timing methods;2)the root cause of parallel timing variability is not fully understood.This paper proposes metrics for evaluating the deviation in measurements and presents ParTES,a tool which emulates realistic cache conditions and timing intervals on X86 and Armv8 CPUs,allowing quantitative evaluation of timing variability across different timing methods.This study performed microsecond-level and millisecond-level analyses of parallel timing deviations on Kunpeng,Phytium,and Hygon processors.The results show that the performance of timing methods,cache status,nearby instructions,and server hardware configurations all influence accuracy is excellent.Among these CPUs,the most stable timing methods are PAPIon Kunpeng,POSIX’s clock_gettime on Phytium,and the RDTSC instruction on Hygon.

关 键 词：高性能计算 并行计算 性能评测 性能分析 误差分析 

分 类 号：TP302[自动化与计算机技术—计算机系统结构]