TMS320C548并行通信接口的设计  

Design of a Parallel Communication Interface of TMS320C548

作　　者：徐文志[1] 

机构地区：[1]解放军理工大学通信工程学院电信工程系,江苏南京210007

出　　处：《军事通信技术》2002年第4期40-45,共6页Journal of Military Communications Technology

摘　　要：文章简要介绍了一种采用AT89C51和TMS320C548构造的低速率话音编解码DSP系统。着重介绍了微控制器AT89C51与DSP芯片TMS320C548构成主、从处理器应用模式时,主处理器AT89C51与从处理器TMS320C548之间的并行通信接口的设计方法。In this paper, a design method using AT89C51 and TMS320C548 to implement a low bit rate speech coder & decoder digital signal processor system is simply presented, and the parallel communication interface design method between the host processor AT89C51 and the subordinate TMS320C548 is especially described while the microcontroller AT89C51 and the DSP chip TMS320C548 are used with one being a host processor and the other a subordinate processor.

关 键 词：TMS320C548 并行通信 接口 数字信号处理芯片 微控制器 语音编码 

分 类 号：TN912.32[电子电信—通信与信息系统]