Fault—Tolerant Systems with Concurrent Error—Locating Capability  

作　　者：江建慧 闵应骅 彭澄廉 

机构地区：[1]Department of Computer Science and Technology, Tongji University, Shanghai 200092, P.R. China,Department of Computing and Information Technology, Fudan University, Shanghai 200433, P.R. China [2]Institute of Computing Technology, The Chinese Academy of Sciences, Beijing 100080, P.R. China [3]Department of Computing and Information Technology, Fudan University, Shanghai 200433, P.R. China

出　　处：《Journal of Computer Science & Technology》2003年第2期190-200,共11页计算机科学技术学报（英文版）

基　　金：上海市高等学校优秀青年教师基金，国家自然科学基金

摘　　要：Fault-tolerant systems have found wide applications in military, industrial andcommercial areas. Most of these systems are constructed by multiple-modular redundancy or er-ror control coding techniques. They need some fault-tolerant specific components (such as voter,switcher, encoder, or decoder) to implement error-detecting or error-correcting functions. However,the problem of error detection, location or correction for fault-tolerance specific components them-selves has not been solved properly so far. Thus, the dependability of a whole fault-tolerant systemwill be greatly affected. This paper presents a theory of robust fault-masking digital circuits forcharacterizing fault-tolerant systems with the ability of concurrent error location and a new schemeof dual-modular redundant systems with partially robust fault-masking property. A basic robustfault-masking circuit is composed of a basic functional circuit and an error-locating corrector. Sucha circuit not only has the ability of concurrent error correction, but also has the ability of concurrenterror location. According to this circuit model, for a partially robust fault-masking dual-modularredundant system, two redundant modules based on alternating-complementary logic consist of thebasic functional circuit. An error-correction specific circuit named as alternating-complementarycorrector is used as the error-locating corrector. The performance (such as hardware complexity,time delay) of the scheme is analyzed.

分 类 号：TP302.8[自动化与计算机技术—计算机系统结构] TN79[自动化与计算机技术—计算机科学与技术]