线性和非线性寄存器系统的并行化技术  

Paralleling Techniques for Linear and Non-linear Register Systems

作　　者：秦晓懿[1] 王瀚晟[1] 曾烈光[1] 

机构地区：[1]清华大学电子工程系微波与数字通信技术国家重点实验室,北京100084

出　　处：《电子学报》2003年第3期406-410,共5页Acta Electronica Sinica

基　　金：国家"九五"科技攻关项目 (No 0 2 3962 3)

摘　　要：并行化技术可降低电路工作速率、延时和功耗 ,广泛应用于通信处理中 .对线性寄存器系统 ,通过对系统状态方程和输出方程的讨论提出一般性的 (1,N)并行化方法 ,其对任意并行路数N均有统一计算方法 ;并对某些情况下的 (M ,N)并行提出一种新实现方法 .对非线性寄存器系统 ,给出其定义 ,对其状态转移进行线性化 ,提出线性化矩阵法的并行方法 ;并对其特例———非线性移位寄存器的并行化提出推广延时因子法 .Paralleling techniques play an important role to decrease circuits' frequency and to satisfy requirements of delay and power cost, and have wide application in communication signal processing. For LRS, a universal (1,N) paralleling method is presented by discussions on the system state equation and the output equation. And the computing arithmetic is identical for arbitrary parallel number. A novel method for (M,N) paralleling realization is also presented in some conditions. For ULRS, the definition is given at first, and the paralleling method of linearization matrix method is presented by linearizing states' transfer. For the non-linear shift register, a novel paralleling method called generalizing delay operator method is presented.

关 键 词：线性寄存器 非线性寄存器 非线性移位寄存器 (M N)并行 线性化矩阵法 推广延时因子法 

分 类 号：TP333[自动化与计算机技术—计算机系统结构]