一种基于PCI总线的可编程雷达信号模拟器实现  

Realization of a Programmable Radar Echo Simulator Based on PCI Bus

作　　者：黄智刚[1] 柳重堪[1] 万国龙[1] 单冬梅[1] 

机构地区：[1]北京航空航天大学电子工程系

出　　处：《北京航空航天大学学报》2003年第1期5-8,共4页Journal of Beijing University of Aeronautics and Astronautics

基　　金：国家高技术 863计划资助项目

摘　　要：针对目前雷达回波信号模拟器功能单一、信号回放速度低的问题 ,提出了采用计算机PCI总线式结构、高速FIFO和高速D A的实现方案 ,使模拟器的数据更新速度达到 8MHz,信号回放速率达到 73MHz;采用FPGA技术 ,使系统参数程控可选 ,且可方便地改动其组成结构以适应不同类型的雷达 .通过对合成孔径雷达(SAR ,SyntheticApertureRadar)回波信号的仿真输出 ,并经现场运行表明 ,该方案可行 ,样机运行可靠 ,满足对高分辨率图像的仿真要求 .To improve the performance of current radar echo signal simulators, a scheme was presented with computer PCI bus-organization, high speed FIFO and D/A. With the realization of this scheme, the simulator exhibits a data updating speed as high as 8 MHz and a signal conversion speed as high as 73 MHz. The use of FPGA technology made the system parameters programmable and able to change its structure expediently to adapt different types of radar. Through output signal simulation of synthetic aperture radar, the scheme was proved to be feasible. The operation of a sample machine was shown to be reliable and able to meet the needs of high-resolution image simulation.

关 键 词：雷达回波模拟器 总线式结构 合成孔径雷达 FPGA技术 

分 类 号：TN955.1[电子电信—信号与信息处理]