PDP选址驱动芯片高压管设计  

Design of high-voltage transistor for PDP data driver

作　　者：吴建辉[1] 孙伟锋[1] 陆生礼[1] 

机构地区：[1]东南大学ASIC工程技术研究中心,南京210096

出　　处：《东南大学学报（自然科学版）》2003年第2期134-137,共4页Journal of Southeast University：Natural Science Edition

摘　　要：PDP选址驱动芯片实现低压控制高压输出 ,其中高压管的设计是关键 ,文中提出了能与低压CMOS工艺相兼容的高压管HV CMOS结构及其中的高低压转换电路 ,采用TSUPREM 4与MEDICI软件对其击穿特性进行了相应的模拟分析 ;通过对已流水的芯片中的高压管进行分析验证看出该结构击穿电压大于 80V ,工作电流大于PDP data driver accomplishes high voltage output controlled by low voltage signal, in the chip the key is the design of the high-voltage transistor. A high voltage CMOS (HV-CMOS) being compatible with CMOS process and the convert circuit of voltage have been designed. The characteristic about the HV-CMOS breakdown is analyzed by simulating with TSUPREM-4 and MEDICI. The analysis of the HV-CMOS in the approached chip has been done and it shows that the breakdown voltage of the designed HV transistor is higher than 80 V and the current is more than 40 mA.

关 键 词：等离子体平板显示 击穿特性 高压管 PDP HV-CMOS结构 高低压转换电路 模拟分析 选址驱动芯片 设计 

分 类 号：TN873.94[电子电信—信息与通信工程] TN432