基于复数基的RS译码器的FPGA优化实现  

Optimized FPGA implementation of RS decoder based on composite basis

作　　者：汪晓岩[1] 胡庆生[2] 孙荣久[1] 

机构地区：[1]国家电力公司电力自动化研究院,江苏南京210003 [2]东南大学无线电系,江苏南京210096

出　　处：《通信学报》2003年第4期85-93,共9页Journal on Communications

基　　金：国家电力公司中压配电网复合通信方式研究基金资助项目(S P K J 011-11)

摘　　要：研究了复数基表示GF(28)域元素时RS编译码问题,首先讨论了GF(28)域标准基与复数基之间的相互转换,然后提出了适合FPGA实现的基于复数基的并行乘法器和基于查询表法的求逆和除法算法。最后详细地讨论了基于复数基的RS译码器的FPGA实现原理和框图。A design of Reed-Solomon decoder based on the composite basis representation of GF(28) field elements are considered. First, mapping between canonical basis and composite basis in GF(28) field is described, and then FPGA architecture of parallel multiplier, inverter and divisions based on ROM table in composite basis are presented. Optimum FPGA pipeline architecture of RS decoder in composite basis has been implemented.

关 键 词：复数基 RS译码器 FPGA Galois域乘法 Galois域除法 

分 类 号：TN764[电子电信—电路与系统] TN791