一种用于千兆以太网发接器的高速串-并转换电路  

Design of a Serial-to-Parallel Conversion Circuit for G-bit Ethernet Transceiver

作　　者：苏彦锋[1] 叶菁华[1] 王涛[1] 洪志良[1] 

机构地区：[1]复旦大学集成电路设计实验室,上海200433

出　　处：《微电子学》2003年第3期247-250,254,共5页Microelectronics

摘　　要：　高速串-并转换电路是数字基带传输系统中的重要单元。在对几种常见串-并转换电路的结构和性能进行比较的基础上,利用动态D触发器实现了一种简单实用的结构,并用它设计了适用于千兆以太网发接器的串-并转换电路。同时,对电路中可能存在的问题,如时钟信号的分布,以及动态单元的电荷泄漏,进行了讨论。Techniques and circuit topologies that can be used to realize highspeed serialtoparallel conversion for digital baseband transmission are compared with regard to their performances Based on one of these techniques, a simple but practical circuit structure is implemented using dynamic D flipflop as basic cell, and a serialtoparallel conversion circuit is designed with this simple structure Simulation shows that this circuit is applicable for gigabit Ethernet transceivers A further discussion is also made on some problems, such as the distribution of clock signals and charge leakage of the dynamic cells

关 键 词：千兆以太网 发接器 动态D触发器 串—并转换电路 电路结构 

分 类 号：TP393.11[自动化与计算机技术—计算机应用技术]