FEL64G交换结构的Alpha测试系统  

An Alpha Test System of FEL64G Switch Fabric

作　　者：束礼宝[1] 宋克柱[1] 程敬原[1] 王砚方[1] 

机构地区：[1]中国科学技术大学近代物理系,合肥230027

出　　处：《数据采集与处理》2003年第2期189-193,共5页Journal of Data Acquisition and Processing

摘　　要：为了快速准确地验证 FEL64G交换结构的逻辑功能 ,评估其交换性能 ,本文介绍了一种摈弃了传统的背板与插槽式结构 ,在单块印刷电路板上实现的交换结构测试系统。该系统利用大容量现场可编程门阵列 (Field-programmable gate arrays,FPGA)实现随机数发生器 ,产生随机的激励信元使得完全从硬件上对交换结构的交换性能进行评估和测试成为了一种可行的方法 ;另外 ,由于采用了循环冗余校验 (Cyclic redundancy code,CRC)进行误码率的测试 ,使得收发端间无需进行逐字比较 ,节省了大量用于存储激励信元的存储器。该系统的设计不但检验了 FEL64G交换结构逻辑设计的正确性 ,而且实际所测的交换性能参数与事先的软件仿真结果吻合。In order to verify the logic function and evaluate the switching performance of FEL64G switch fabric quickly and precisely, a test and verification system of the switch fabric is presented. The system is fulfilled in the same printed circuit board after abandoning the traditional backplane-connector architecture. The switching performances are verified and evaluated in hardware by stimulus cells to be feasible. The cells are produced by pseudo random number generators inside large field-programmable gate arrays (FPGA). Moreover, lots of RAMs used for storing stimulus cells are reduced since the cyclic redundancy code error detection technology needs not compare cells between transmitters and receivers. The system confirms the logic function of FEL64G switch fabric and obtains the results of its switching performance consistent with software simulations.

关 键 词：FEL64G 交换结构 Alpha测试系统 FPGA 可编程逻辑器件 印刷电路板 随机数发生器 

分 类 号：TP332.1[自动化与计算机技术—计算机系统结构]