基于脉动阵列的二维DCT算法及其VLSI设计  

2-D DCT Algorithm Based on the Systolic Array and its VLSI Design

作　　者：孙阳[1] 余锋[1] 

机构地区：[1]浙江大学仪器系数字技术与仪器研究所,杭州310027

出　　处：《微电子技术》2003年第5期21-26,36,共7页Microelectronic Technology

摘　　要：本文介绍了一种基于脉动阵列算法的二维离散余弦变换 (2 -DDCT)电路设计。该电路结构不需要复杂的转移存储器 ,而是采用平行输入平行输出的结构 ,完成一次N×N个DCT变换只需要N个周期 ,因此吞吐率是传统DCT的N倍。这种电路结构具有模块化、布线简单、芯片占用面积小等优点 。A 2-D DCT circuit design based on systolic array algorithm is proposed in this paper. In the circuit structure, the complex transfer memory is needless, but the architecture of parallel input and output is used, to complete N×N DCT transformations takes only N clock cycles, so that its throughput is N times as much as that of the traditional DCT. Such circuit structure has advantages of modularization, simple wiring and small chip size; it is well suitable for realization of VLSI.

关 键 词：二维离散余弦变换 超大规模 脉动阵列 

分 类 号：TN492[电子电信—微电子学与固体电子学]