FPGA布线开关的电路设计  

Circuit Design of FPGA Routing Switches

作　　者：郑泉智[1] 杨银堂[1] 高海霞[1] 

机构地区：[1]西安电子科技大学微电子研究所,西安710071

出　　处：《电子器件》2003年第4期344-347,364,共5页Chinese Journal of Electron Devices

基　　金：国防科技预研基金资助项目(41308010205)

摘　　要：在分析隔离岛式FPGA布线结构的基础上,设计了导通晶体管布线开关和三态缓冲布线开关。设计了级恢复电路,解决了导通晶体管开关引起的静态功耗问题。提出了基于扇入的三态缓冲开关bufm,避免了一般缓冲开关的扇出问题。最后,我们对各种布线开关的延时特性作了比较,提出了一些合理的建议。This paper examines circuit design of pass transistor and tri-state buffer routing switches in island-style FPGAs. A level-restoring circuit was designed to solve the static power dissipation problem. A new fan-in based switch bufm was presented which had no fan out problem. Finally, comparison between these routing switches was done and some reasonable advices were made.

关 键 词：现场可编程门阵列 布线开关 优化设计 

分 类 号：TN78[电子电信—电路与系统]