基于FPGA实现TMS320VC3X与SDRAM接口  

Implement Interface between TMS320VC3X and SDRAM Based on the FPGA

作　　者：王维博[1] 吴自恒[1] 

机构地区：[1]西华大学电子信息与电气工程系,四川成都610037

出　　处：《四川工业学院学报》2003年第4期6-8,共3页Journal of Sichuan University of Science and Technology

摘　　要：　同步动态随机存储器(SDRAM)具有高速,大容量,价格低廉等优点,因而成为缓冲存储器的首选,但是SDRAM控制时序比较复杂,不能与DSP直接接口,这极大地限制了它的广泛应用。为了满足电力系统运行对故障数据的精度和实时要求,本文作者基于FPGA提出了一种简单易用的方案,用VHDL语言实现TMS320VC3X与SDRAM的接口。The SDRAM has become the chief choice of the buffer storage because of its high speed, great capacity, and low price; but due to its complex control timing, it cannot directly interface with DSP. To satisfy the requirement of the fault data's precision and real timing in the power system, the paper introduces a new simple way to implement a interface between TMS320VC3X and synchronous dynamic random access memory (SDRAM) using VHDL based on the FPGA.

关 键 词：硬件描述语言 现场可编程逻辑门阵列 数字信号处理器 同步动态随机存储器 

分 类 号：TP334.7[自动化与计算机技术—计算机系统结构]