VHDL语言实现FIFO存储控制  

FIFO memory controller based on VHDL design

作　　者：郑波祥 陈笑[1] 齐晋[1] 

机构地区：[1]哈尔滨工程大学自动化学院,黑龙江哈尔滨150001

出　　处：《应用科技》2003年第12期37-39,共3页Applied Science and Technology

摘　　要：介绍了用VHDL实现FIFO存储控制器的设计,给出了整个FIFO系统的控制原理,对控制单元作了详细的说明,并给出控制器的读、写时序图、写周期的状态图和部分编制的程序.控制器用于试验中的某数据处理模块中,运行稳定.从设计的特征看,这个控制器有一定的通用性和实用性.The design of a FIFO memory controller was completed with VHDL.The theory of FIFO system was introduced and the structure of controlling unit was shown clearly, and reading and writting time sequence were also given.This controller is now successfully used in the data processing module and it can be used in many areas.

关 键 词：VHDL语言 FIFO存储控制器 设计 先进先出储存器 数据缓冲器 

分 类 号：TP332.3[自动化与计算机技术—计算机系统结构]