IA-64中软件流水的寄存器需求研究  

Research on Register Requirements of Software Pipelined Loops in the IA-64 Architecture

作　　者：林海波[1] 李文龙[1] 汤志忠[1] 

机构地区：[1]清华大学计算机科学与技术系,北京100084

出　　处：《计算机研究与发展》2004年第1期22-27,共6页Journal of Computer Research and Development

基　　金：国家自然科学基金项目 ( 60 173 0 10 );国家"八六三"高技术研究发展计划基金项目 ( 2 0 0 1AA1110 60)

摘　　要：软件流水是开发循环程序指令级并行性的重要方法之一 IA 6 4是支持软件流水的EPIC体系结构 通过对NASBenchmarks中可软件流水循环所需的寄存器进行量化分析 ,提出了一种限制循环展开因子的启发式算法 ,有效地解决了因可用寄存器不足而导致软件流水失败的问题 。Software pipelining is a loop scheduling technique that extracts instruction level parallelism by overlapping the execution of several consecutive iterations. IA-64 is a new EPIC architecture that provides hardware support on software pipelining. The register requirements of software pipelined loops are evaluated, and a new heuristic algorithm is proposed to restrict unrolling factor. Experimental results show that the new algorithm increases the number of software pipelined loops and improves the performance of compiler.

关 键 词：软件流水 IA-64 寄存器需求 

分 类 号：TP314[自动化与计算机技术—计算机软件与理论]