使用优化的CIOS算法的模运算处理器  

Modular arithmetic processor based on an optimized CIOS algorithm

作　　者：孙怡乐[1] 吴行军[1] 陈弘毅[1] 

机构地区：[1]清华大学微电子学研究所,北京100084

出　　处：《清华大学学报（自然科学版）》2004年第4期538-541,共4页Journal of Tsinghua University(Science and Technology)

基　　金：国家"八六三"高技术项目(2002AA141040)

摘　　要：为以较小的面积代价实现RSA公钥密码算法及其他一些算法所需的求模、模加、模乘、模幂等运算,该文设计了一种可作为协处理器使用的模运算处理器。运算数据的长度可变,范围从256b到2048b。采用优化的CIOS(coarselyintegratedoperatedscanning)算法以加快模乘的速度。充分的流水线设计使得时钟频率可达60MHz,在该工作频率下完成1024b模幂的时间为57ms。除RAM外的核心电路仅含16000等效门,在0.35μmCMOS工艺条件下,包含RAM的电路总面积仅为3.31mm2。该处理器适合用于嵌入式系统,尤其是面积局限性高的系统。An area efficient modular arithmetic processor was developed that is capable of performing RSA public-key cryptography and other modular arithmetic operations as a coprocessor. The operands can vary in size from 256 to 2 048 bit. An optimized coarsely integrated operated scanning (CIOS) algorithm was used to speed up the modular multiplication. The fully pipelined architecture has a maximum clock rate of 60 MHz which takes 57 ms to complete a 1 024 bit modular exponentiation. The core circuit without RAM contains 16 000 gates and the whole area measures only 3.31 mm^2 using 0.35 μm CMOS technology. The processor is suitable for embedded systems, especially in area-constrained environments.

关 键 词：CIOS算法 模运算处理器 公钥密码算法 RSA MONTGOMERY模乘 微程序 

分 类 号：TP33[自动化与计算机技术—计算机系统结构] TP309.7[自动化与计算机技术—计算机科学与技术]