基于CORDIC的一种高速实时定点FFT的FPGA实现  

A High Speed Real-time and Fixed-point FPGA Realization of a CORDIC Based FFT Processor

作　　者：李成诗[1] 初建朋[1] 李新兵[1] 韩芳[1] 蒋菱[1] 赖宗声[1] 徐晨 景为平 

机构地区：[1]华东师范大学微电子电路与系统研究所,上海200062 [2]江苏省专用集成电路设计重点实验室,南通226007

出　　处：《微电子学与计算机》2004年第4期88-91,96,共5页Microelectronics & Computer

基　　金：上海市科委PDC项目(合同号:027062012);江苏省专用集成电路设计重点实验室(KJS03056)资助

摘　　要：本文论述了一种利用CORDIC算法在FPGA上实现高速实时定点FFT的设计方案。利用CORDIC算法来实现复数乘法,与使用乘法器相比降低了系统的资源占用率,提高了系统速度[1]。设计基于基4时序抽取FFT算法,采用双端口内置RAM和流水线串行工作方式。本设计针对256点、24位长数据进行运算,在XilnxSpartan2E系列的xc2s300e器件下载验证通过,完成一次运算约为12μs,可运用于高速DSP、数字签名算法等对速度要求高的领域。This paper presents a new technique of high-speed real-time and fixed-point FPGA realization of a CORDIC based FFT processor. The way that use CORDIC algorithm to implement the complex number's multiplication uses less resource and reaches higher speed compare to the way using multipliers . This design is based on decimation-in-time 4-based Fast-Fourier-Transform (FFT), using dual ports imbedded block ram and pipeline structure. This design calculates for 256 points, 24 bits and it has been implemented in xc2s300e device of XilinxSpartan2E series. It only needs 12 ns to complete one calculation. It can be used in the domain of high-speed DSP and Digital Signature, which demand high speed.

关 键 词：FF FPGA CORDIC算法 

分 类 号：TN911.7[电子电信—通信与信息系统]