数字调频系统专用频率合成电路的设计  

Design of PLL Frequency Synthesizer for Digital Tuning System

作　　者：刘莎[1] 卢雪萍[1] 马骏[1] 

机构地区：[1]杭州电子工业学院,浙江杭州310037

出　　处：《电子元器件应用》2004年第4期40-42,共3页Electronic Component & Device Applications

摘　　要：针对汽车音响收音数字调谐系统的实例,介绍一种广播用双波段锁相环频率合成电路的设计方法。该设计采用串行端口按位传输数据的方式,在程序分频器部分使用吞脉冲技术,不仅简化了控制器的操作,而且获得了较高的频率分辨率,具有广泛的市场前景。The phase locked loop (PLL) frequency synthesizer for digital tuning system(DTS), which is used in DTS of car radio receiver, is presented. The format of serial transmission data and a pluse-swallow method in programmable divider is used. The operation of MCU has been simplified, and the frequency resolution has been also increased. The product has good market prospect.

关 键 词：数字调谐系统 锁相环频率合成电路 吞脉冲计数器 串行数据传输 

分 类 号：TN409[电子电信—微电子学与固体电子学]