一种新的布斯编码器结构  

A Novel Booth Encoder Architecture

作　　者：刘建军[1] 王东琳[1] 李立健[1] 

机构地区：[1]中科院自动化所国家专用集成电路设计工程研究中心,北京100080

出　　处：《微电子学与计算机》2004年第5期73-75,共3页Microelectronics & Computer

摘　　要：针对传统乘法器中布斯编码器存在的问题,文章提出了一种新式布斯编码器结构。传统的布斯编码器采用3个编码信号,在处理不同的部分积时电路比较臃肿,新的结构采用四个编码信号,可以方便地实现乘法/乘累加切换,并且处理不同情况下的部分积非常简单,而电路本身并没有变得复杂。新的布斯编码器的另一个特点是全部采用了MUX结构来搭建,这样给最终布线带来很大方便。最后通过HSPICE(0.35μmCMOS)模拟进一步证明了新编码器相对于以往的编码器的优势。In this paper, a novel Booth Encoder that can be applied to MAC is proposed because of the disadvantage of the conventional Booth Encoder. 3 Encoder signals are used in the conventional Booth Encoder, and the circuit is complex as the partial products change. 4 signals are adopted in the proposed architecture,the exchange between multiplier and MAC is very convenient, while the circuit has not much extra increment. Another special point in the new Booth Encoder is that it is composed of MUX entirely, so the realization of circuit is simple. The new architecture has better performance compared to others in HSPICE simulation.

关 键 词：布斯编码器 乘法器 

分 类 号：TP391[自动化与计算机技术—计算机应用技术]