集成电路动态老化测试系统中高速驱动板设计  

Design of High-Speed Driving Board for Integrated Circuit of Burn-In Test System

作　　者：曾榕[1] 张福洪[1] 楼津甫 

机构地区：[1]杭州电子科技大学通信工程学院,杭州

出　　处：《电路与系统》2014年第4期53-58,共6页Open Journal of Circuits and Systems

摘　　要：随着大规模集成电路生产技术的迅猛发展,多引脚封装的芯片、大容量的存储器及大规模嵌入式微处理器的广泛应用,国内现有的集成电路动态老化测试系统已不能满足需求。该文针对FPGA/CPLD集成度高、设计灵活等优点,设计并实现了一种应用于新一代动态老化系统的高速驱动板系统。该系统以Altera公司的MAXII系列CPLD芯片EPM570T144I5N为核心。通过FPGA/CPLD软硬件平台验证,该系统各个模块均工作正常,并能满足驱动能力的需求。With the rapid development of production technology for large-scale integrated circuits, applica-tions of multi-pin package chip, large capacity memory and large scale of embedded microprocessor are more and more widely used. Domestic integrated circuit of dynamic burn-in system has been unable to meet the demand. In this paper, taking advantages of FPGA/CPLD high integration, flexible design, etc., it designs and implements high-speed driving board system applied in a new generation of dynamic burn-in system. The system takes the EPM570T144I5N of MAXII series chip in Altera Company as the core. Through the verification of FPGA/CPLD hardware platform, each module of the system works normally and can meet the requirements of driving ability.

关 键 词：集成电路 动态老化 驱动板 现场可编程逻辑门阵列 

分 类 号：TP2[自动化与计算机技术—检测技术与自动化装置]