An Enhanced Bulk-Driven Folded-Cascode Amplifier in 0.18 µm CMOS Technology  

作　　者：Arash Ahmadpour Pooya Torkzadeh 

机构地区：[1]Department of Electronic Engineering, Islamic Azad University, Lahijan Branch, Lahijan, Iran [2]Department of Electronic Engineering, Islamic Azad University, Science and Research Branch, Tehran, Iran

出　　处：《Circuits and Systems》2012年第2期187-191,共5页电路与系统（英文）

摘　　要：A new configuration of Bulk-Driven Folded-Cascode (BDFC) amplifier is presented in this paper. Due to this modifying, significant improvement in differential DC-Gain (more than 11 dB) is achieved in compare to the conventional structure. Settling behavior of proposed amplifier is also improved and accuracy more than 8 bit for 500 mV voltage swing is obtained. Simulation results using HSPICE Environment are included which validate the theoretical analysis. The amplifier is designed using standard 0.18 μm CMOS triple-well (level 49) process with supply voltage of 1.2 V. The correct functionality of this configuration is verified from –50℃ to 100℃.A new configuration of Bulk-Driven Folded-Cascode (BDFC) amplifier is presented in this paper. Due to this modifying, significant improvement in differential DC-Gain (more than 11 dB) is achieved in compare to the conventional structure. Settling behavior of proposed amplifier is also improved and accuracy more than 8 bit for 500 mV voltage swing is obtained. Simulation results using HSPICE Environment are included which validate the theoretical analysis. The amplifier is designed using standard 0.18 μm CMOS triple-well (level 49) process with supply voltage of 1.2 V. The correct functionality of this configuration is verified from –50℃ to 100℃.

关 键 词：BULK-DRIVEN FOLDED-CASCODE (BDFC) AMPLIFIER DC-Gain BULK-DRIVEN (BD) FOLDED-CASCODE (FC) CMOS 

分 类 号：TN7[电子电信—电路与系统]