Rapid Prototype with Field Gate (A Design and Implementation of Stepper Motor Using FPGA)  

作　　者：Warsame H. Ali Emmanuel S. Kolawole Pamela Obiomon John H. Fuller Shukri Ali Penrose Cofie Warsame H. Ali;Emmanuel S. Kolawole;Pamela Obiomon;John H. Fuller;Shukri Ali;Penrose Cofie(Department of Electrical and Computer Engineering, Prairie View A&M University, Prairie View, USA)

机构地区：[1]Department of Electrical and Computer Engineering, Prairie View A&M University, Prairie View, USA

出　　处：《Circuits and Systems》2016年第8期1392-1403,共12页电路与系统（英文）

摘　　要：This paper presents the design and implementation of a Stepper Motor using Nexys2 circuit board based on a Xilinx Spartan 3E Field Programmable Gate Array (FPGA) device with VHDL code. The algorithm implemented on FPGA allows a substantial decrease of the equivalent processing time developed by different velocity controllers. The Stepper Speed control is achieved using VHDL code, and the hardware digital circuit is designed for a programmable rotational stepper motor using VHDL as a tool and FPGA as a target technology. The 50 MHZ provided by the starter kit is divided to obtain the necessary delay time between the motor phases that ranges between 2 - 10 m seconds. Though output selections, the direction of rotation of the stepper motor besides the magnitude of the angle of movement and the rotation speed can be controlled. The major advantage of using reconfigurable hardware (FPGA) in implementing the Stepper Motor instead of a discrete digital component is that it makes modifications to the design easy and quick and also, the total design hence represents an embedded system (works without computer). The total programmable hardware design that controlled on the stepper motor movement, occupied an area that did not exceed 12% of the chip resources.This paper presents the design and implementation of a Stepper Motor using Nexys2 circuit board based on a Xilinx Spartan 3E Field Programmable Gate Array (FPGA) device with VHDL code. The algorithm implemented on FPGA allows a substantial decrease of the equivalent processing time developed by different velocity controllers. The Stepper Speed control is achieved using VHDL code, and the hardware digital circuit is designed for a programmable rotational stepper motor using VHDL as a tool and FPGA as a target technology. The 50 MHZ provided by the starter kit is divided to obtain the necessary delay time between the motor phases that ranges between 2 - 10 m seconds. Though output selections, the direction of rotation of the stepper motor besides the magnitude of the angle of movement and the rotation speed can be controlled. The major advantage of using reconfigurable hardware (FPGA) in implementing the Stepper Motor instead of a discrete digital component is that it makes modifications to the design easy and quick and also, the total design hence represents an embedded system (works without computer). The total programmable hardware design that controlled on the stepper motor movement, occupied an area that did not exceed 12% of the chip resources.

关 键 词：Stepper Motor Xilinx Spartan 3E FPGA Xilinx ISE Tools User I/O LEDS PMOD Motion Control VHDL PLANAHEAD 

分 类 号：TN3[电子电信—物理电子学]