ROUTER

作品数:206被引量:121H指数:6
导出分析报告
相关领域:电子电信自动化与计算机技术更多>>
相关作者:吕英华王亮唐永林曾增烽王坚更多>>
相关机构:清华大学北京邮电大学北京汇通天下物联科技有限公司东北师范大学更多>>
相关期刊:更多>>
相关基金:国家自然科学基金国家重点基础研究发展计划国家高技术研究发展计划国家教育部博士点基金更多>>
-

检索结果分析

结果分析中...
选择条件:
  • 期刊=Journal of Semiconductorsx
条 记 录,以下是1-5
视图:
排序:
A congestion-aware OE router employing fair arbitration for network-on-chip
《Journal of Semiconductors》2018年第12期190-196,共7页Lu Liu Yadong Sun Zhangming Zhu Yintang Yang 
Project supported by the National Natural Science Foundation of China(No.61625403)
To meet the demand for high on-chip network performance, flexible routing algorithms supplying path diversity and congestion alleviation are required. We propose a CAOE-FA router as a combination of congestionawarenes...
关键词:NETWORK-ON-CHIP odd-even turn model congestion-aware router fair arbitration 
A low overhead load balancing router for network-on-chip
《Journal of Semiconductors》2016年第11期87-93,共7页周小锋 刘露 朱樟明 周端 
Project supported by the National Natural Science Foundation of China(Nos.61474087,61322405,61376039)
The design of a router in a network-on-chip (NoC) system has an important impact on some perfor- mance criteria. In this paper, we propose a low overhead load balancing router (LOLBR) for 2D mesh NoC to enhance ro...
关键词:NOC low overhead load balancing ROUTER 
A load balancing bufferless deflection router for network-on-chip
《Journal of Semiconductors》2016年第7期104-111,共8页周小锋 朱樟明 周端 
Project supported by the National Natural Science Foundation of China(Nos.61474087,61322405,61376039)
The bufferless router emerges as an interesting option for cost-efficient in network-on-chip (NoC) de- sign. However, the bufferless router only works well under low network load because deflection more easily occur...
关键词:NOC load balancing deflection router 
A Gridless Router Based on Hierarchical PB Corner Stitching Structure
《Journal of Semiconductors》2003年第2期141-147,共7页张轶谦 蔡懿慈 洪先龙 张雁 谢民 
国家自然科学基金 (批准号 :60 1670 16);国家重点基础研究发展规划 (No.G19980 3 0 40 3 )资助项目~~
A multi layer gridless area router is reported.Based on corner stitching,this router adopts tile expansion to explore path for each net.A heuristic method that penalizes nodes deviating from the destination is devise...
关键词:gridless area routing rip  up and reroute corner stitching structure VLSI 
MARS:A General Multilayer Area Router被引量:1
《Journal of Semiconductors》2001年第4期516-519,共4页马琪 严晓浪 
Based on a ripped-up and rerouted methodology,a multilayer area detailed router is presented by using simulated evolution technique.A modified maze algorithm is also performed for the single net.
关键词:multilayer area detailed router simulated evolution modified maze algorithm 
检索报告 对象比较 聚类工具 使用帮助 返回顶部