互连内建自测试技术的原理与实现  

Theory and implementation of Interconnect Built-In-Self-Test

作　　者：虞美兰[1] 丁琳[1] 

机构地区：[1]江南计算技术研究所,江苏无锡214083

出　　处：《微计算机信息》2008年第5期268-270,共3页Control & Automation

摘　　要：芯片间的互连速率已经达到GHz量级,相比较于低速互连,高速互连的测试遇到了新的挑战。本文探讨了高速互连测试的难点,传统互连测试方法的不足,进而介绍了互连内建自测试(IBIST)的结构以及方法,最后给出IBIST在FPGA中的一种实现。The bandwidth of interconnection between ICs has already been up to Multi-Gigabit. In comparison with low-speed,the test of high-speed interconnection confronts new challenges. This paper summarizes the challenges associated with high-speed interconnect test,points out the insufficiencies of traditional interconnect test technologies,then the architecture and methodology of Interconnect Built-In-Self-Test (IBIST) is introduced to meet those challenges. Finally,an implementation of IBIST in FPGA is proposed.

关 键 词：高速互连 互连测试 内建自测试 

分 类 号：TP274[自动化与计算机技术—检测技术与自动化装置]